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nx01/src/site/wigiti/msx/overview-spec.md

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#MSX Overview

The "++" is 18 bit re-implementation of the 8 bit MSX.

  • msx0++ = micro-controller platform (no PSG,no VDP,no keyboard)
  • msx1++ = kids mode-1 of msx3++ (max 16 colors at 640x480, NO PCM)
  • msx2++ = kids mode-2 of msx3++ (max 18 bit at 2k)
  • msx3++ = tricorders and nx01 terminal interfaces
  • msx4 = 144 bit unlimited size matrix cube

7HFF

Basic++

Beginners
All-purpose
Symbolic
Instruction
Code
++

Variables will me made fix fixed lenght hard translatable 18 bit words.
So all BASIC++ code will be for every child in 100% local human language.

MSX-BASIC 6.0 has the following features to delete ASCII from the MSX;

  • Source in FC18(5785) as binary tokens in namespaced container tree format
  • Upgrade to OPL(1984) BASIC without line numbers
  • Embed APL(1966) into BASIC to write very short math functions
  • Emded MPI-2(2007) like message interface for multi-process runtime
  • Emded binary structure tree support, struct+inter and transform
  • Uses simple Decimal-144 and 1152 bit NCR fractions
  • Add time slicer for stepped BASIC code see: arduino pulsefire mal.c

MSX4ATARI-SPEC

Goodbye bit, goodbye bytes.

  • Cache is design error
  • DMA is design error
  • SMP is design error
  • Shared memory is design error
  • Threads are design error
  • Unicode is one big brainfuck
  • Computer language in human letters

The last real computer language was MSX basic as it stored the code in binary format.
A real computer language does not used a human ascii file format.
A child should not have to learn english and loose is culture just to write code,
Code and docs written by a hindi speaking child should be usable by a spanish speaking child.

MSX0⁺⁺ spec

A simple 18 bit platform for embedded and boot device.
See it as a MSX like one-chip 18 bit "Tandem T16" main frame.

MSX0++:

  • 18 bit CPU; ZR8000
  • 144 bit memory mapper
  • MSXMMU+MSXIOMU for diplavi
  • MSXSLOT2
  • new 10Mhz UART console
  • MSX spec without VDP,PSG and keyboard

ZR8000

  • i8080 register based + ix/iy
  • 18 bit data bus
  • Z8000 quad memory space
  • external stack for unlimited stack
  • opCode traps
  • Multiport CPU with 4 data and addr busses

Machine nodes of skynet, able to run native CP/M code from 1978. Replaces all other embedded platforms.

MSX3⁺⁺ spec

Equal to MSX0⁺⁺ spec, but added;

MSX3++:

  • 4x CPU
  • 4x VDP
  • 4x Blitter
  • 4x OPL4

Humanoid nodes of skynet. For tricorder's devices and UI panels.

MSX4 spec

True 18 bit platform with 144 bit CPU.

MSX4;

  • CPU; TR9000
  • TempleOS4 + Orange ERP OS on FPGA matrix

TR9000

  • MISC stack based (see philips MISC)
  • 144 bit data internals
  • external stack for unlimited stack
  • Multiport CPU with 8 ports, thus 5 stacks for matrix math
  • Native Decimal144 for BASIC number
  • Simple 1152 bit fractions for MATH

So a prototype "workstation" MSX4 matrix is 18 units; 18 by 18 grid stacked 18 high in cube.

So FPGA matrix of 5832 chips to test small scale.

Unlimited size matrix computers for adult octal nx01 warpcore running TempleOS.

CPU Device

cpu-node