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src/site/wigiti/msx/overview-spec.md
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#MSX Overview
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The "++" is 18 bit re-implementation of the 8 bit MSX.
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- msx0++ = micro-controller platform (no PSG,no VDP,no keyboard)
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- msx1++ = kids mode-1 of msx3++ (max 16 colors at 640x480, NO PCM)
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- msx2++ = kids mode-2 of msx3++ (max 18 bit at 2k)
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- msx3++ = tricorders and nx01 terminal interfaces
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- msx4 = 144 bit unlimited size matrix cube
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MSX4 design parameters;
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- unlimited cpu
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- unlimited memory
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- unlimited devices
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- unlimited storage
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- unlimited network
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- unlimited number precision
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## Basic++
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Beginners
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All-purpose
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Symbolic
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Instruction
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Code
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++
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Variables will me made fix fixed lenght hard translatable 18 bit words.
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So all BASIC++ code will be for every child in 100% local human language.
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MSX-BASIC `6.0` has the following features to delete ASCII from the MSX;
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- Source in FC18(5785) as binary tokens in namespaced container tree format
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- Upgrade to OPL(1984) BASIC without line numbers
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- Embed APL(1966) into BASIC to write very short math functions
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- Emded MPI-2(2007) like message interface for multi-process runtime
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- Emded binary structure tree support, struct+inter and transform
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- Uses simple `Decimal-144` and 1152 bit NCR fractions
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- Add time slicer for stepped BASIC code see: arduino pulsefire [mal.c](http://git.savannah.gnu.org/cgit/pulsefire.git/tree/pulsefire-chip/src/main/c/mal.c)
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# MSX4ATARI-SPEC
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Goodbye bit, goodbye bytes.
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- Cache is design error
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- DMA is design error
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- SMP is design error
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- Shared memory is design error
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- Threads are design error
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- Unicode is one big brainfuck
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- Computer language in human letters
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The last real computer language was MSX basic as it stored the code in binary format.
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A real computer language does not used a human ascii file format.
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A child should not have to learn english and loose is culture just to write code,
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Code and docs written by a hindi speaking child should be usable by a spanish speaking child.
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## MSX0⁺⁺ spec
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A simple 18 bit platform for embedded and boot device.
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See it as a MSX like one-chip 18 bit "Tandem T16" main frame.
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MSX0++:
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- 18 bit CPU; ZR8000
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- 144 bit memory mapper
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- MSXMMU+MSXIOMU for diplavi
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- MSXSLOT2
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- new 10Mhz UART console
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- MSX spec without VDP,PSG and keyboard
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ZR8000
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- i8080 register based + ix/iy
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- 18 bit data bus
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- Z8000 quad memory space
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- external stack for unlimited stack
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- opCode traps
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- Multiport CPU with 4 data and addr busses
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There are 4 addressable spaces;
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* 2^18 addresses for code memory.
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* 2^18 addresses for data memory.
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* limited 512 words stack WINDOW peek for "unlimited stack size".
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* limited 512 words for local I/O and matrix switching requests.
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All four windows have separated data and address busses.
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The infinity stack controller has a few pages local in a ring buffer,
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so it can request a new memory page when the stack fills.
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Besides the stack, the code/data memory is paged and can be recursive
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switched to load/store a full page(36KB) from the unlimited global memory.
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This is done by a cpu slot device controller which is a packet interface to
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the slot controllers
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Machine nodes of skynet, able to run native CP/M code from 1978.
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Replaces all other embedded platforms.
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## MSX3⁺⁺ spec
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Equal to MSX0⁺⁺ spec, but added;
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MSX3++:
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- 4x CPU
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- 4x VDP
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- 4x Blitter
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- 4x OPL4
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Humanoid nodes of skynet.
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For tricorder's devices and UI panels.
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## MSX4 spec
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True 18 bit platform with 144 bit CPU.
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MSX4;
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- CPU; TR9000
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- TempleOS4 + Orange ERP OS on FPGA matrix
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- Holydeck full 3D display output
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TR9000
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- MISC stack based (see philips MISC)
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- 144 bit data internals
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- external stack for unlimited stack
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- Multiport CPU with 8 ports, thus 5 stacks for matrix math
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- Native Decimal144 for BASIC number
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- Simple 1152 bit fractions for MATH
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So a prototype "workstation" MSX4 matrix is 18 units;
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18 by 18 grid stacked 18 high in cube.
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So FPGA matrix of 5832 chips to test small scale.
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Unlimited size matrix computers for adult octal nx01 warpcore running TempleOS.
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## CPU Device
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