Added msx and images
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src/_schemas/.generated
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The files in this folder are generated.
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src/site/wigiti/images/readme-no2all/jdatstart.xml
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<?xml version="1.0" encoding="UTF-8"?>
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<jnlp spec="1.0+" codebase="dat:ᐊ˥˧˧˨˨˥˥˧˥˥˧˧˥˥˧˦˦˩˩˧˥˦˧˥˩˧˥˩˧˧˩˨˨˨˧˧˩˥˧˥˩˧˩˩˥˥˧˩˩˧˩˥˧˥˥˧˧˨˨˧˨˨ᐅ/app/1.0/">
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<!-- NOTE: ONLY THE XML EDITOR OF ECLIPSE RENDERING 3th level of unicode tone letter magic...
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Level1: dat:ᐊ˥˧˧˨˨˥˥˧˥˥˧˧˥˥˧˦˦˩˩˧˥˦˧˥˩˧˥˩˧˧˩˨˨˨˧˧˩˥˧˥˩˧˩˩˥˥˧˩˩˧˩˥˧˥˥˧˧˨˨˧˨˨ᐅ/app/1.0/
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Level2: ˥˧˧˨˨˥˥˧˥˥˧˧˥˥˧˦˦˩˩˧˥˦˧˥˩˧˥˩˧˧˩˨˨˨˧˧˩˥˧˥˩˧˩˩˥˥˧˩˩˧˩˥˧˥˥˧˧˨˨˧˨˨
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-->
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<information>
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<title>Hello</title>
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<vendor>Example</vendor>
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</information>
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<resources>
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<j2se version="1.2+" />
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<jar href="hello.jar" main="true" />
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</resources>
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<application-desc />
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</jnlp>
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BIN
src/site/wigiti/images/readme/hypercubus-4d-china-key2.png
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src/site/wigiti/images/readme/msx-cube-art.png
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src/site/wigiti/images/readme/nether-book-large.png
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src/site/wigiti/images/readme/virgin-nl-1616.png
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src/site/wigiti/msx/images/msx4-7HFF.png
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src/site/wigiti/msx/images/msx4-cpu-node.png
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src/site/wigiti/msx/images/msx4-memmapper.png
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src/site/wigiti/msx/msx-memmap2.md
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# MSX Memory Mapper 2
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Upgrade of MSX memory mapper system;
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* 144 bit page address
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* 14 bit page size
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* 18 bit width
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So the MSX page size goes from 16KB to about 36KB per page.
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Max addressable memory of a single mapper in yotta-bytes;
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((2^14)*18*(2^144))/8/1024/1024/1024/1024/1024/1024/1024/1024
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680020773533228910772224
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Google thinks that up to 2025, global data creation is projected
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to grow to just a small 180 zettabytes, so having multiple copies all
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human data on a single memory controller should be OK for the nx-01.
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![memmap2](images/msx4-memmapper.png "memmap2")
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src/site/wigiti/msx/msx-overview.md
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#MSX Overview
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The "++" is 18 bit re-implementation of the 8 bit MSX.
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- msx0++ = micro-controller platform (no PSG,no VDP,no keyboard)
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- msx1++ = kids mode-1 of msx3++ (max 16 colors at 640x480, NO PCM)
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- msx2++ = kids mode-2 of msx3++ (max 18 bit at 2k)
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- msx3++ = tricorders and nx01 terminal interfaces
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- msx4 = 144 bit unlimited size matrix cube
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![7HFF](images/msx4-7HFF.png)
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## Basic++
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Beginners
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All-purpose
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Symbolic
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Instruction
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Code
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++
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Variables will me made fix fixed lenght hard translatable 18 bit words.
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So all BASIC++ code will be for every child in 100% local human language.
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# MSX4ATARI-SPEC
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Goodbye bit, goodbye bytes.
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- Cache is design error
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- DMA is design error
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- SMP is design error
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- Shared memory is design error
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- Threads are design error
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- Unicode is one big brainfuck
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- Computer language in human letters
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The last real computer language was MSX basic as it stored the code in binary format.
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A real computer language does not used a human ascii file format.
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A child should not have to learn english and loose is culture just to write code,
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Code and docs written by a hindi speaking child should be usable by a spanish speaking child.
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## MSX0⁺⁺ spec
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A mixed 8/18 bit platform.
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MSX0++:
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- 18 bit CPU; ZR8000
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- 144 bit memory mapper
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- MSXMMU+MSXIOMU for diplavi
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- MSXSLOT2
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- new 10Mhz UART console
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- no VDP
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- no PSG
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- CPU: ZR8000
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- msxdiommu
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- msxslot3 platform
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- msxmem3 mapper
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- msxuart3 console
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Machine nodes of skynet, able to run native CP/M code from 1978.
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Replaces all other embedded platforms.
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## MSX3⁺⁺ spec
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Equal to MSX0⁺⁺ spec, but added;
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MSX3++:
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- 4x CPU
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- 4x VDP
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- 4x Blitter
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- 4x OPL4
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Humanoid nodes of skynet.
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For tricorder's devices and UI panels.
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## MSX4 spec
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True 18 bit platform with 144 bit CPU.
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MSX4;
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- 144 bit CPU; TR9000 (philips MISC based)
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- TempleOS4 + Orange ERP OS on FPGA matrix
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- CPU: TR9000
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So a prototype "workstation" MSX4 matrix is 18 units;
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18 by 18 grid stacked 18 high in cube.
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So FPGA matrix of 5832 chips to test small scale.
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Unlimited size matrix computers for adult octal nx01 warpcore running TempleOS.
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## CPU Device
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![cpu-node](images/msx4-cpu-node.png "cpu-node")
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